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Letter 31028
Seeking 100um patterned plating on glass,
small volume
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Good morning,
We have a requirement for a plating process of some form to
provide a stand-off of 100um (4 mils) +/- 10um on 150mm (6") round
glass (borofloat) wafers. The wafers are 700um thick and coated with
a custom anti-reflective coating (ARC). We need to build up a spacer
layer to provide a hermetic seal. Thus, we wish build up a series of
oval (race-track-like) rings on one side of the wafer; the other side
must remain clear and undeposited. On top of this ring, we will print
a low-melting temperature sealing glass (frit) for hermtic sealing to
a semiconductor device. The frit burnout and bonding processes will
take place over several hours at 400-450C. Thus, the plated metal
must be stable at these temperatures, cannot by too porous and must
have intimate (strong) adhesion to the glass substrate. We can
provide a patterned seed layer of arbitrary composition (we have a
CHA evaporator). The ARC layer has a top coat of silicon dioxide and
is likely to be fairly robust to most chemistries. The pattern is a
repetative series of rings and can easily be interconnected with a
contact point provided, thus electro-plating or electroless-plating
can be considered. We have considered using 100um of plated nickel,
but have been told that the material is too "stressy" and that it
will cause our wafer to curl or bow. The CTE of the borofloat is
about 3.2 ppm/C over these temperature ranges. Since we are a
semiconductor foundry, we are looking for a firm that is comfortable
with our severe cleanliness requirements (the glass will be used for
an optical component in the telecom industry). Testing would involve
pull-testing sealed parts, and evaluating hermeticity through
temperature/humidity cycling. Our volumes are likely to be small at
this point, needing a half-dozen to a dozen parts for testing
purposes and needing perhaps five-to-ten parts per month.
Thank you for your time,
Kevin A. Shaw, PhD
MEMS Semiconductor foundry - Ithaca, New York, USA
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